1. Field of the Invention
The invention relates generally to microelectronic structures. More particularly, the invention relates to contact resistance test structures within microelectronic structures.
2. Description of the Related Art
As microelectronic structures and microelectronic devices have decreased in aerial plan-view dimensions to a point where aerial linewidth dimensions are nearing physical limitations of metal oxide semiconductor field effect transistor (MOSFET) scaling and lithographic capabilities, a trend has recently evolved within microelectronic fabrication, and in particular within semiconductor fabrication, to utilize a third vertical dimension when fabricating microelectronic structures. The use of such a third vertical dimension provides three-dimensional integrated circuits.
Although such three-dimensional integrated circuits are desirable within the microelectronic fabrication and semiconductor fabrication arts, such three-dimensional integrated circuits are nonetheless not entirely without problems. In particular, it is desirable within such three-dimensional integrated circuits to assure that vertical electrical connections to successively vertically layered structures are electrically functional, and thus also have a desirably low contact resistance.
Contact resistance measurement structures that are applicable to three-dimensional circuits are known in the microelectronic fabrication and semiconductor fabrication arts.
For example, Chen et al., in “Contact Resistance Measurement of Bonded Copper Interconnects for Three-Dimensional Integration Technology,” IEEE Electron Device Letters 2004, Digital Object Identifier 10.1109/LED.2003.821591, teaches a contact resistance test structure for use within bonded copper interconnects within three-dimensional integrated circuits. This particular contact resistance test structure comprises an overlapping X shaped test structure that is not susceptible to misalignment.
As microelectronic technology, including semiconductor technology, continues to advance, the evolution of three-dimensional integrated circuits is likely to continue to be prominent. Thus, desirable are test structures and related methods, such as but not limited to contact resistance test structures and related methods, that provide for efficient and reliable integration of three-dimensional integrated circuits.